LPC313x Linux Board Support Package (BSP)
Introduction
NXP provides a Linux Board Support Package (BSP) that supports most of the peripherals of the LPC313x/4x/5x microcontrollers as well as several target boards.
This board support package is maintained by NXP Semiconductors and is periodically updated with issue fixes or new features.
The current LPC313x Linux BSP supports all the following devices:
- LPC313x series (LPC3130 and LPC3131); Tested on EA3131 board
- Use 'ea313x_v1_config/ea313x_v2_config' for Apex
- Use 'ea313x_defconfig' for Linux build
- LPC314x series (LPC3141 and LPC3143); Tested on NXP internal VAL3153 board
- Use 'val315x_config' for Apex
- Use 'val3153_defconfig' for Linux build
- LPC315x series (LPC3152 and LPC3154); Tested on NXP internal VAL3154 board
- Use 'val3154_config' for Apex
- Use 'val3154_defconfig' for Linux build
Features
The Linux LPC313x R2B BSP has the following kernel features:
- Support for Linux kernel 2.6.28.2
- Support for DMA and CGU (clock generation unit)
- Support for the Embedded Artists LPC3131 OEM board with version 1.0 IO board
- Supports the Micron NAND flash present on the EA3131 board
- Supports the external LED/GPIO controller PCA9532 present on the EA3131 board
- Support for the Embedded Artists LPC3131 OEM board with version 2.0 IO board
- SD/MMC support
- 2 I2C channel support
- UART support
- USB EHCI host support 1
- USB gadget driver support 1
- Basic USB OTG function 1
- LPC313x audio SoC driver
- Support for UDA1380 codec on EA boards
- MTD support (with HW ECC)
- GPIO support
- External interrupts through event router support
- SPI bus driver with DMA
- DM9000 Ethernet driver
- Support for NFS root file system on EA Ver. 2.0 boards
1 At startup, based on the USB ID pin state, either the EHCI host device or the gadget device is added.
On the EA boards, the "USB Host" jumper could be used for this functionality.
The Linux LPC313x R2B BSP has the following bootloader features:
- Support for Apex 1.6.8
- UART boot support
- SD/MMC card boot support
- Ethernet boot support
- Enhanced NAND boot support (with HW ECC), autoformat on first bootup and bad block management
- USB boot support (with external linked library)
- Ethernet boot support
- Core speed 270MHz (for LPC314x) vs. 180MHz (LPC313x) now selectable from menuconfig
- Dynamic clock scaling 2
2 The LPC313x CGU block has a hardware-assisted dynamic clock scaling feature which slows down the core clocks if the AHB bus is inactive.
In this build, the slower clocks are set to 90MHz/64.
The Linux kernel patches and Apex patches are available as part of a Linux patch file bundle (below) for users who wish to develop their own Linux system or use ELDK framework.
A complete Linux system can also be built with the Linux Target Image Builder (LTIB) which will handle most of the tasks of gathering packages, configuring images, building the root files, and deploying the image to the target board.
The Apex boot loader 1.6.8 source code is provided for your convenience at the bottom of this page.
Support Documents
Where to Start
The easiest way to get started with Linux and the LPC313x/4x/5x microcontrollers is to download the quick start guide (above) and follow the steps to build and deploy a complete Linux system on the Embedded Artists LPC3131 board.
The quick start guide will provide the quickest and easiest method to get the necessary tools and software and to build the necessary images and the root filesystem.
In the Linux patch file bundle below, delta patches between the different releases (R1A, R2, etc.) can be found in the 'patches/delta' directory.
Files located in the 'patches' directory (apex-1.6.8_lpc313x.patch, linux-2.6.28.2_lpc313x.patch) are always cumulative patch files up to the most current release.
Known Issues
The following issues are known in the Linux LPC313x R2B BSP:
-
Apex RO + RW + BSS area might exceed 96KB if multiple features are enabled.
This will be an issue for boards with LPC3130 chips which have only 96KB of ISRAM.
Workaround: Select minimum features in Apex for LPC3130 boards.
-
Sometimes the following message appears after linux boots:
bash-3.2# INFO: task kmmcd:102 blocked for more than 120 seconds.
"echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message.
[<c0200018>] (schedule+0x0/0x294) from [<c0200498>] (schedule_timeout+0x20/0xc4)
[<c0200478>] (schedule_timeout+0x0/0xc4) from [<c01ffef0>] (wait_for_common+0xe0
/0x174)
r7:c3852000 r6:7fffffff r5:00000000 r4:00000000
[<c01ffe10>] (wait_for_common+0x0/0x174) from [<c0200014>] (wait_for_completion+
0x18/0x1c)
[<c01ffffc>] (wait_for_completion+0x0/0x1c) from [<c018a454>] (mmc_wait_for_req+
0x114/0x124)
[<c018a340>] (mmc_wait_for_req+0x0/0x124) from [<c018d2b0>] (mmc_app_send_scr+0x
f4/0x158)
r6:c3853ec0 r5:c3853e80 r4:c3853e54
Workaround: Supress the warning messages by typing the following at the shell prompt:
echo 0 > /proc/sys/kernel/hung_task_timeout_secs
-
Audio doesn't render samples on the very first playback operation with UDA1380 codec.
Rootcause: Under investigation.
Workaround: On startup, start a dummy audio playback and stop immediately.
Second time onwards, audio samples are rendered properly.
-
Apex NAND boot doesn't work on some EA boards.
Rootcause: The logic circuit used to control data buffers on the EA3131 board doesn't consider the reset state of mLCD_CSB pin.
After reset, the mLCD_CSB pin functions as LCD_CSB instead of EBI_NSTCS_0.
LCD_CSB is an active high signal (by default) and hence, the LPC313x drives this pin low after reset.
On EA3131 boards, this signal is used to enable data buffer (U16), and EBI_DQM_0_NOE is used to control the direction of buffer.
So, after reset, the data buffer is enabled and during NAND read access, EBI_DQM_0_NOE goes low (since EBI_DQM_0_NOE is also used as NAND_RD signal), making both the data buffer and the NAND device drive the data bus EBI_D[15:0].
Due to this, the LPC313x boot ROM is not able to read NAND data properly and hence failing to boot from NAND.
Normal NAND operations under Apex and Linux are not affected by this issue since Apex, during initialization, configures the mLCD_CSB pin as the EBI_NSTCS_0 signal.
Workaround: Remove the DBUF_EN jumper on the base board for NAND boot to work.
Once Apex boots, manually install the jumper back for proper SDRAM and Ethernet operations.
More Information
Disclaimer
This software is provided AS-IS by NXP Semiconductors.
NXP Semiconductors does not support or warrant the software contained herein for any purpose other than for informational use.
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