--------------------------------------------------------------------------- -- Copyright Message -- --------------------------------------------------------------------------- -- -- NXP Semiconductors confidential and proprietary. -- COPYRIGHT 2009 by NXP Semiconductors N.V. -- -- All rights are reserved. Reproduction in whole or in part is -- prohibited without the written consent of the copyright owner. -- -- --------------------------------------------------------------------------- -- Design Information -- --------------------------------------------------------------------------- -- -- File : $RCSfile: LPC315XFET180_REVDASH_2009_10_12.BSDL.rca $ -- -- Author : $Author: sfaver $ -- -- Description : LPC315XFET180_REVDASH_2009_10_12.BSDL -- -- --------------------------------------------------------------------------- -- $Id: LPC315XFET208_REVDASH_2009_10_12.BSDL.rca 1.1 Mon Oct 13 20:24:55 2008 sfaver Experimental $ -- $Source: /home/usb10152/bsdl/LPC315XFET208_REVDASH_2009_10_12.BSDL.rca $ -- --------------------------------------------------------------------------- -- ------------------------------------------------------------------------------- -- Job Status: Pass -- -- File Name: LPC315XFET208_REVDASH_2009_10_12.BSDL -- Timestamp: Monday, October 12th, 2009 6:28 PM Entity name: LPC315XFET208 IEEE Std 1149.1-2001 (Version 2.0) Packaging option selected is UNDEFINED. Inputs = 0 Outputs = 1 Bidirectionals = 81 Instruction Reg Length = 9 Boundary Reg Length = 249 BSDL compilation of 700 lines completed without errors. ------------------------------------------------------------------------------- entity LPC315XFET208 is generic (PHYSICAL_PIN_MAP : string :="TFBGA208"); port (ADC_GNDA : linkage BIT; ADC_MIC : linkage BIT; ADC_TINL : linkage BIT; ADC_TINR : linkage BIT; ADC_VDDA18 : linkage BIT; ADC_VDDA33 : linkage BIT; ADC_VINL : linkage BIT; ADC_VINR : linkage BIT; ADC_VREF : linkage BIT; ADC_VREFN : linkage BIT; ADC_VREFP : linkage BIT; ADC10B_GNDA : linkage BIT; ADC10B_GPA0 : linkage BIT; ADC10B_GPA1 : linkage BIT; ADC10B_GPA2 : linkage BIT; ADC10B_VDDA33 : linkage BIT; CHARGE_BAT_SENSE : linkage BIT; CHARGE_CC_REF : linkage BIT; CHARGE_VBAT : linkage BIT; CHARGE_VBUS : linkage BIT; CHARGE_VNTC : linkage BIT; CHARGE_VSS : linkage BIT; CLOCK_OUT : out BIT; DAC_VDDA33 : linkage BIT; DAC_VREFN : linkage BIT; DAC_VREFP : linkage BIT; DAI_BCK0 : inout BIT; DAI_DATA0 : inout BIT; DAI_WS0 : inout BIT; EBI_A_0_ALE : inout BIT; EBI_A_1_CLE : inout BIT; EBI_D_0 : inout BIT; EBI_D_1 : inout BIT; EBI_D_10 : inout BIT; EBI_D_11 : inout BIT; EBI_D_12 : inout BIT; EBI_D_13 : inout BIT; EBI_D_14 : inout BIT; EBI_D_15 : inout BIT; EBI_D_2 : inout BIT; EBI_D_3 : inout BIT; EBI_D_4 : inout BIT; EBI_D_5 : inout BIT; EBI_D_6 : inout BIT; EBI_D_7 : inout BIT; EBI_D_8 : inout BIT; EBI_D_9 : inout BIT; EBI_DQM_0_NOE : inout BIT; EBI_NCAS_BLOUT_0 : inout BIT; EBI_NRAS_BLOUT_1 : inout BIT; EBI_NWE : inout BIT; FFAST_IN : linkage BIT; FFAST_OUT : linkage BIT; FSLOW_IN : linkage BIT; FSLOW_OUT : linkage BIT; GPIO0 : inout BIT; GPIO1 : inout BIT; GPIO2 : inout BIT; GPIO3 : inout BIT; GPIO4 : inout BIT; HP_FCL : linkage BIT; HP_FCR : linkage BIT; HP_GNDA : linkage BIT; HP_OUTC : linkage BIT; HP_OUTL : linkage BIT; HP_OUTR : linkage BIT; HP_VDDA10 : linkage BIT; HP_VDDA33 : linkage BIT; HP_VREF : linkage BIT; I2C_SCL0 : inout BIT; I2C_SDA0 : inout BIT; JTAGSEL_ARM : in BIT; mDAO_BCK0 : inout BIT; mDAO_CLK0 : inout BIT; mDAO_DATA0 : inout BIT; mDAO_WS0 : inout BIT; mGPIO10 : inout BIT; mGPIO5 : inout BIT; mGPIO6 : inout BIT; mGPIO7 : inout BIT; mGPIO8 : inout BIT; mGPIO9 : inout BIT; mLCD_CSB : inout BIT; mLCD_DB_0 : inout BIT; mLCD_DB_1 : inout BIT; mLCD_DB_10 : inout BIT; mLCD_DB_11 : inout BIT; mLCD_DB_12 : inout BIT; mLCD_DB_13 : inout BIT; mLCD_DB_14 : inout BIT; mLCD_DB_15 : inout BIT; mLCD_DB_2 : inout BIT; mLCD_DB_3 : inout BIT; mLCD_DB_4 : inout BIT; mLCD_DB_5 : inout BIT; mLCD_DB_6 : inout BIT; mLCD_DB_7 : inout BIT; mLCD_DB_8 : inout BIT; mLCD_DB_9 : inout BIT; mLCD_E_RD : inout BIT; mLCD_RS : inout BIT; mLCD_RW_WR : inout BIT; mNAND_RYBN0 : inout BIT; mNAND_RYBN1 : inout BIT; mNAND_RYBN2 : inout BIT; mNAND_RYBN3 : inout BIT; mUART_CTS_N : inout BIT; mUART_RTS_N : inout BIT; NAND_NCS_0 : inout BIT; NAND_NCS_1 : inout BIT; NAND_NCS_2 : inout BIT; NAND_NCS_3 : inout BIT; PSU_LX1 : linkage BIT; PSU_LX2 : linkage BIT; PSU_PLAY : linkage BIT; PSU_STOP : linkage BIT; PSU_VBAT : linkage BIT; PSU_VBUS : linkage BIT; PSU_VIN1 : linkage BIT; PSU_VOUT1 : linkage BIT; PSU_VOUT2 : linkage BIT; PSU_VOUT3 : linkage BIT; PSU_VSS1 : linkage BIT; PSU_VSSA : linkage BIT; PSU_VSSA_CLEAN : linkage BIT; PWM_DATA : inout BIT; RSTIN_N : inout BIT; RTC_BACKUP : linkage BIT; RTC_INT : linkage BIT; RTC_VDD36 : linkage BIT; RTC_VSS : linkage BIT; SPI_CS_IN : inout BIT; SPI_CS_OUT0 : inout BIT; SPI_MISO : inout BIT; SPI_MOSI : inout BIT; SPI_SCK : inout BIT; TCK : in BIT; TDI : in BIT; TDO : out BIT; TMS : in BIT; TRST_N : in BIT; UART_RXD : inout BIT; UART_TXD : inout BIT; UOS_CX1 : linkage BIT; UOS_CX2 : linkage BIT; UOS_VBAT : linkage BIT; UOS_VBUS : linkage BIT; UOS_VSS : linkage BIT; USB_DM : linkage BIT; USB_DP : linkage BIT; USB_GNDA : linkage BIT; USB_ID : linkage BIT; USB_RREF : linkage BIT; USB_VBUS : linkage BIT; USB_VDDA12_PLL : linkage BIT; USB_VDDA33 : linkage BIT; USB_VDDA33_DRV : linkage BIT; USB_VSSA_REF : linkage BIT; USB_VSSA_TERM : linkage BIT; VDDA12 : linkage BIT; VDDE_7 : linkage BIT; VDDI_3 : linkage BIT; VPP : linkage BIT; VSSA12 : linkage BIT; VSSE_3 : linkage BIT; VSSI_3 : linkage BIT); use STD_1149_1_2001.all; attribute COMPONENT_CONFORMANCE of LPC315XFET208 : entity is "STD_1149_1_2001"; attribute PIN_MAP of LPC315XFET208: entity is PHYSICAL_PIN_MAP; constant UNDEFINED : PIN_MAP_STRING := "ADC_GNDA : N16," & "ADC_MIC : R15," & "ADC_TINL : P13," & "ADC_TINR : P14," & "ADC_VDDA18 : N15," & "ADC_VDDA33 : N14," & "ADC_VINL : T15," & "ADC_VINR : R14," & "ADC_VREF : T16," & "ADC_VREFN : R16," & "ADC_VREFP : T17," & "ADC10B_GNDA : A13," & "ADC10B_GPA0 : B12," & "ADC10B_GPA1 : C13," & "ADC10B_GPA2 : C12," & "ADC10B_VDDA33 : B13," & "CHARGE_BAT_SENSE : K17," & "CHARGE_CC_REF : K15," & "CHARGE_VBAT : K16," & "CHARGE_VBUS : J14," & "CHARGE_VNTC : J17," & "CHARGE_VSS : J15," & "CLOCK_OUT : M4," & "DAC_VDDA33 : C14," & "DAC_VREFN : F15," & "DAC_VREFP : F16," & "DAI_BCK0 : T9," & "DAI_DATA0 : P9," & "DAI_WS0 : R9," & "EBI_A_0_ALE : C4," & "EBI_A_1_CLE : A2," & "EBI_D_0 : J3," & "EBI_D_1 : H3," & "EBI_D_10 : C2," & "EBI_D_11 : D2," & "EBI_D_12 : E2," & "EBI_D_13 : F2," & "EBI_D_14 : G2," & "EBI_D_15 : H2," & "EBI_D_2 : H4," & "EBI_D_3 : G4," & "EBI_D_4 : F4," & "EBI_D_5 : F3," & "EBI_D_6 : E4," & "EBI_D_7 : E3," & "EBI_D_8 : D3," & "EBI_D_9 : A3," & "EBI_DQM_0_NOE : K3," & "EBI_NCAS_BLOUT_0 : J2," & "EBI_NRAS_BLOUT_1 : J4," & "EBI_NWE : K4," & "FFAST_IN : A10," & "FFAST_OUT : B10," & "FSLOW_IN : L17," & "FSLOW_OUT : L16," & "GPIO0 : R13," & "GPIO1 : T14," & "GPIO2 : P12," & "GPIO3 : D12," & "GPIO4 : D11," & "HP_FCL : C16," & "HP_FCR : B15," & "HP_GNDA : B16," & "HP_OUTC : D14," & "HP_OUTL : B17," & "HP_OUTR : C15," & "HP_VDDA10 : D13," & "HP_VDDA33 : A16," & "HP_VREF : E14," & "I2C_SCL0 : A9," & "I2C_SDA0 : C10," & "JTAGSEL_ARM : U10," & "mDAO_BCK0 : T12," & "mDAO_CLK0 : T11," & "mDAO_DATA0 : T13," & "mDAO_WS0 : R12," & "mGPIO10 : C6," & "mGPIO5 : D7," & "mGPIO6 : B7," & "mGPIO7 : C7," & "mGPIO8 : D6," & "mGPIO9 : B6," & "mLCD_CSB : R8," & "mLCD_DB_0 : T7," & "mLCD_DB_1 : P8," & "mLCD_DB_10 : P4," & "mLCD_DB_11 : U4," & "mLCD_DB_12 : T4," & "mLCD_DB_13 : U3," & "mLCD_DB_14 : U2," & "mLCD_DB_15 : R4," & "mLCD_DB_2 : T6," & "mLCD_DB_3 : R6," & "mLCD_DB_4 : U6," & "mLCD_DB_5 : P6," & "mLCD_DB_6 : R5," & "mLCD_DB_7 : T5," & "mLCD_DB_8 : U5," & "mLCD_DB_9 : P5," & "mLCD_E_RD : P7," & "mLCD_RS : R7," & "mLCD_RW_WR : T8," & "mNAND_RYBN0 : B5," & "mNAND_RYBN1 : C5," & "mNAND_RYBN2 : D5," & "mNAND_RYBN3 : D4," & "mUART_CTS_N : P11," & "mUART_RTS_N : R11," & "NAND_NCS_0 : L2," & "NAND_NCS_1 : L3," & "NAND_NCS_2 : L4," & "NAND_NCS_3 : M2," & "PSU_LX1 : H15," & "PSU_LX2 : G17," & "PSU_PLAY : C17," & "PSU_STOP : D15," & "PSU_VBAT : E16," & "PSU_VBUS : J16," & "PSU_VIN1 : G16," & "PSU_VOUT1 : H14," & "PSU_VOUT2 : G14," & "PSU_VOUT3 : E17," & "PSU_VSS1 : H16," & "PSU_VSSA : D16," & "PSU_VSSA_CLEAN : D17," & "PWM_DATA : D10," & "RSTIN_N : E15," & "RTC_BACKUP : K14," & "RTC_INT : M16," & "RTC_VDD36 : L15," & "RTC_VSS : M17," & "SPI_CS_IN : D9," & "SPI_CS_OUT0 : D8," & "SPI_MISO : A8," & "SPI_MOSI : B8," & "SPI_SCK : C8," & "TCK : U12," & "TDI : T10," & "TDO : F14," & "TMS : U9," & "TRST_N : U11," & "UART_RXD : R10," & "UART_TXD : P10," & "UOS_CX1 : R17," & "UOS_CX2 : P17," & "UOS_VBAT : P16," & "UOS_VBUS : P15," & "UOS_VSS : N17," & "USB_DM : R1," & "USB_DP : T1," & "USB_GNDA : T2," & "USB_ID : P3," & "USB_RREF : N4," & "USB_VBUS : N3," & "USB_VDDA12_PLL : N2," & "USB_VDDA33 : R3," & "USB_VDDA33_DRV : T3," & "USB_VSSA_REF : P2," & "USB_VSSA_TERM : R2," & "VDDA12 : B11," & "VDDE_7 : G15," & "VDDI_3 : M14," & "VPP : C9," & "VSSA12 : C11," & "VSSE_3 : U8," & "VSSI_3 : M15"; attribute TAP_SCAN_CLOCK of TCK : signal is (10.0E6, BOTH); attribute TAP_SCAN_IN of TDI : signal is true; attribute TAP_SCAN_OUT of TDO : signal is true; attribute TAP_SCAN_MODE of TMS : signal is true; attribute TAP_SCAN_RESET of TRST_N : signal is true; attribute COMPLIANCE_PATTERNS of LPC315XFET208 : entity is "(JTAGSEL_ARM) (0)"; attribute INSTRUCTION_LENGTH of LPC315XFET208 : entity is 9; attribute INSTRUCTION_OPCODE of LPC315XFET208 : entity is "BYPASS (111111111) ," & "SAMPLE (001000010) ," & "PRELOAD (001000010) ," & "EXTEST (000000000) ," & "IDCODE (111100001) ," & "CLAMP (010000110) ," & "PROGRAM_TCB (100000100) ," & "PROGRAM_TPR (100100101) ," & "PROGRAM_TCB_A (111100100) ," & "PROGRAM_TPR_A (111100101) ," & "PROGRAM_TCB_D (100001011) ," & "PROGRAM_TPR_D (100101011) "; attribute INSTRUCTION_CAPTURE of LPC315XFET208 : entity is "000100001"; attribute INSTRUCTION_PRIVATE of LPC315XFET208 : entity is "PROGRAM_TCB," & "PROGRAM_TPR," & "PROGRAM_TCB_A," & "PROGRAM_TPR_A," & "PROGRAM_TCB_D," & "PROGRAM_TPR_D"; attribute IDCODE_REGISTER of LPC315XFET208 : entity is "0001" & "0011100100101110" & "00000010101" & "1"; attribute REGISTER_ACCESS of LPC315XFET208 : entity is "BYPASS (BYPASS,CLAMP), " & "BOUNDARY (SAMPLE,PRELOAD,EXTEST), " & "DEVICE_ID (IDCODE), " & "TCB_REG[1316] (PROGRAM_TCB), " & "TPR_REG[1273] (PROGRAM_TPR), " & "TCB_REG_A[319] (PROGRAM_TCB_A), " & "TPR_REG_A[245] (PROGRAM_TPR_A), " & "TCB_REG_D[997] (PROGRAM_TCB_D), " & "TPR_REG_D[1028] (PROGRAM_TPR_D) "; attribute BOUNDARY_LENGTH of LPC315XFET208 : entity is 249; attribute BOUNDARY_REGISTER of LPC315XFET208 : entity is "248 (BC_1, *, INTERNAL, X)," & "247 (BC_2, *, INTERNAL, 1)," & "246 (BC_1, I2C_SDA0, INPUT, X)," & "245 (BC_1, I2C_SDA0, OUTPUT2, 1, 245, 1, WEAK1)," & "244 (BC_1, I2C_SCL0, INPUT, X)," & "243 (BC_1, I2C_SCL0, OUTPUT2, 1, 243, 1, WEAK1)," & "242 (BC_1, *, INTERNAL, X)," & "241 (BC_2, *, INTERNAL, 1)," & "240 (BC_1, *, INTERNAL, X)," & "239 (BC_2, *, INTERNAL, 1)," & "238 (BC_7, EBI_D_9, BIDIR, X, 237, 1, Z)," & "237 (BC_2, *, CONTROL, X)," & "236 (BC_7, EBI_D_10, BIDIR, X, 235, 1, Z)," & "235 (BC_2, *, CONTROL, X)," & "234 (BC_7, EBI_D_11, BIDIR, X, 233, 1, Z)," & "233 (BC_2, *, CONTROL, X)," & "232 (BC_7, EBI_D_12, BIDIR, X, 231, 1, Z)," & "231 (BC_2, *, CONTROL, X)," & "230 (BC_7, EBI_D_13, BIDIR, X, 229, 1, Z)," & "229 (BC_2, *, CONTROL, X)," & "228 (BC_7, EBI_D_14, BIDIR, X, 227, 1, Z)," & "227 (BC_2, *, CONTROL, X)," & "226 (BC_7, DAI_BCK0, BIDIR, X, 225, 1, Z)," & "225 (BC_2, *, CONTROL, X)," & "224 (BC_7, mGPIO9, BIDIR, X, 223, 1, Z)," & "223 (BC_2, *, CONTROL, X)," & "222 (BC_7, mGPIO6, BIDIR, X, 221, 1, Z)," & "221 (BC_2, *, CONTROL, X)," & "220 (BC_7, mLCD_DB_7, BIDIR, X, 219, 1, Z)," & "219 (BC_2, *, CONTROL, X)," & "218 (BC_7, mLCD_DB_4, BIDIR, X, 217, 1, Z)," & "217 (BC_2, *, CONTROL, X)," & "216 (BC_7, mLCD_DB_2, BIDIR, X, 215, 1, Z)," & "215 (BC_2, *, CONTROL, X)," & "214 (BC_7, mNAND_RYBN0, BIDIR, X, 213, 1, Z)," & "213 (BC_2, *, CONTROL, X)," & "212 (BC_7, GPIO1, BIDIR, X, 211, 1, PULL0)," & "211 (BC_2, *, CONTROL, X)," & "210 (BC_7, EBI_D_4, BIDIR, X, 209, 1, Z)," & "209 (BC_2, *, CONTROL, X)," & "208 (BC_7, DAI_DATA0, BIDIR, X, 207, 1, Z)," & "207 (BC_2, *, CONTROL, X)," & "206 (BC_1, *, INTERNAL, X)," & "205 (BC_2, *, INTERNAL, 1)," & "204 (BC_7, UART_RXD, BIDIR, X, 203, 1, Z)," & "203 (BC_2, *, CONTROL, X)," & "202 (BC_7, SPI_CS_IN, BIDIR, X, 201, 1, Z)," & "201 (BC_2, *, CONTROL, X)," & "200 (BC_7, mDAO_CLK0, BIDIR, X, 199, 1, Z)," & "199 (BC_2, *, CONTROL, X)," & "198 (BC_7, mDAO_BCK0, BIDIR, X, 197, 1, Z)," & "197 (BC_2, *, CONTROL, X)," & "196 (BC_7, EBI_A_1_CLE, BIDIR, X, 195, 1, Z)," & "195 (BC_2, *, CONTROL, X)," & "194 (BC_7, EBI_NCAS_BLOUT_0, BIDIR, X, 193, 1, Z)," & "193 (BC_2, *, CONTROL, X)," & "192 (BC_7, NAND_NCS_3, BIDIR, X, 191, 1, Z)," & "191 (BC_2, *, CONTROL, X)," & "190 (BC_7, mLCD_DB_0, BIDIR, X, 189, 1, Z)," & "189 (BC_2, *, CONTROL, X)," & "188 (BC_7, EBI_DQM_0_NOE, BIDIR, X, 187, 1, Z)," & "187 (BC_2, *, CONTROL, X)," & "186 (BC_1, *, INTERNAL, X)," & "185 (BC_2, *, INTERNAL, 1)," & "184 (BC_1, *, INTERNAL, X)," & "183 (BC_2, *, INTERNAL, 1)," & "182 (BC_1, *, INTERNAL, X)," & "181 (BC_2, *, INTERNAL, 1)," & "180 (BC_1, CLOCK_OUT, OUTPUT2, X, 180, 1, PULL1)," & "179 (BC_7, UART_TXD, BIDIR, X, 178, 1, Z)," & "178 (BC_2, *, CONTROL, X)," & "177 (BC_1, *, INTERNAL, X)," & "176 (BC_2, *, INTERNAL, 1)," & "175 (BC_7, SPI_CS_OUT0, BIDIR, X, 174, 1, Z)," & "174 (BC_2, *, CONTROL, X)," & "173 (BC_7, NAND_NCS_0, BIDIR, X, 172, 1, Z)," & "172 (BC_2, *, CONTROL, X)," & "171 (BC_7, NAND_NCS_1, BIDIR, X, 170, 1, Z)," & "170 (BC_2, *, CONTROL, X)," & "169 (BC_7, NAND_NCS_2, BIDIR, X, 168, 1, Z)," & "168 (BC_2, *, CONTROL, X)," & "167 (BC_7, mLCD_CSB, BIDIR, X, 166, 1, Z)," & "166 (BC_2, *, CONTROL, X)," & "165 (BC_7, mLCD_E_RD, BIDIR, X, 164, 1, Z)," & "164 (BC_2, *, CONTROL, X)," & "163 (BC_7, mLCD_RS, BIDIR, X, 162, 1, Z)," & "162 (BC_2, *, CONTROL, X)," & "161 (BC_7, mLCD_RW_WR, BIDIR, X, 160, 1, Z)," & "160 (BC_2, *, CONTROL, X)," & "159 (BC_7, mUART_RTS_N, BIDIR, X, 158, 1, Z)," & "158 (BC_2, *, CONTROL, X)," & "157 (BC_7, EBI_NRAS_BLOUT_1, BIDIR, X, 156, 1, Z)," & "156 (BC_2, *, CONTROL, X)," & "155 (BC_7, EBI_A_0_ALE, BIDIR, X, 154, 1, Z)," & "154 (BC_2, *, CONTROL, X)," & "153 (BC_7, EBI_NWE, BIDIR, X, 152, 1, Z)," & "152 (BC_2, *, CONTROL, X)," & "151 (BC_1, *, INTERNAL, 1)," & "150 (BC_1, *, INTERNAL, 1)," & "149 (BC_1, *, INTERNAL, 1)," & "148 (BC_1, *, INTERNAL, 1)," & "147 (BC_7, EBI_D_0, BIDIR, X, 146, 1, Z)," & "146 (BC_2, *, CONTROL, X)," & "145 (BC_7, EBI_D_1, BIDIR, X, 144, 1, Z)," & "144 (BC_2, *, CONTROL, X)," & "143 (BC_7, EBI_D_2, BIDIR, X, 142, 1, Z)," & "142 (BC_2, *, CONTROL, X)," & "141 (BC_7, EBI_D_3, BIDIR, X, 140, 1, Z)," & "140 (BC_2, *, CONTROL, X)," & "139 (BC_7, EBI_D_5, BIDIR, X, 138, 1, Z)," & "138 (BC_2, *, CONTROL, X)," & "137 (BC_7, EBI_D_6, BIDIR, X, 136, 1, Z)," & "136 (BC_2, *, CONTROL, X)," & "135 (BC_7, EBI_D_7, BIDIR, X, 134, 1, Z)," & "134 (BC_2, *, CONTROL, X)," & "133 (BC_7, EBI_D_8, BIDIR, X, 132, 1, Z)," & "132 (BC_2, *, CONTROL, X)," & "131 (BC_7, EBI_D_15, BIDIR, X, 130, 1, Z)," & "130 (BC_2, *, CONTROL, X)," & "129 (BC_7, DAI_WS0, BIDIR, X, 128, 1, Z)," & "128 (BC_2, *, CONTROL, X)," & "127 (BC_1, *, INTERNAL, X)," & "126 (BC_2, *, INTERNAL, 1)," & "125 (BC_1, *, INTERNAL, X)," & "124 (BC_2, *, INTERNAL, 1)," & "123 (BC_7, PWM_DATA, BIDIR, X, 122, 1, Z)," & "122 (BC_2, *, CONTROL, X)," & "121 (BC_7, GPIO0, BIDIR, X, 120, 1, PULL0)," & "120 (BC_2, *, CONTROL, X)," & "119 (BC_7, GPIO2, BIDIR, X, 118, 1, Z)," & "118 (BC_2, *, CONTROL, X)," & "117 (BC_7, GPIO3, BIDIR, X, 116, 1, Z)," & "116 (BC_2, *, CONTROL, X)," & "115 (BC_7, GPIO4, BIDIR, X, 114, 1, Z)," & "114 (BC_2, *, CONTROL, X)," & "113 (BC_1, *, INTERNAL, X)," & "112 (BC_2, *, INTERNAL, 1)," & "111 (BC_1, *, INTERNAL, X)," & "110 (BC_2, *, INTERNAL, 1)," & "109 (BC_1, *, INTERNAL, X)," & "108 (BC_2, *, INTERNAL, 1)," & "107 (BC_1, *, INTERNAL, X)," & "106 (BC_2, *, INTERNAL, 1)," & "105 (BC_1, *, INTERNAL, X)," & "104 (BC_2, *, INTERNAL, 1)," & "103 (BC_1, *, INTERNAL, X)," & "102 (BC_2, *, INTERNAL, 1)," & "101 (BC_1, *, INTERNAL, X)," & "100 (BC_2, *, INTERNAL, 1)," & "99 (BC_1, *, INTERNAL, X)," & "98 (BC_2, *, INTERNAL, 1)," & "97 (BC_1, *, INTERNAL, X)," & "96 (BC_2, *, INTERNAL, 1)," & "95 (BC_1, *, INTERNAL, X)," & "94 (BC_2, *, INTERNAL, 1)," & "93 (BC_7, SPI_MISO, BIDIR, X, 92, 1, Z)," & "92 (BC_2, *, CONTROL, X)," & "91 (BC_7, SPI_MOSI, BIDIR, X, 90, 1, Z)," & "90 (BC_2, *, CONTROL, X)," & "89 (BC_7, SPI_SCK, BIDIR, X, 88, 1, Z)," & "88 (BC_2, *, CONTROL, X)," & "87 (BC_7, mLCD_DB_1, BIDIR, X, 86, 1, Z)," & "86 (BC_2, *, CONTROL, X)," & "85 (BC_7, mLCD_DB_3, BIDIR, X, 84, 1, Z)," & "84 (BC_2, *, CONTROL, X)," & "83 (BC_7, mLCD_DB_5, BIDIR, X, 82, 1, Z)," & "82 (BC_2, *, CONTROL, X)," & "81 (BC_7, mLCD_DB_6, BIDIR, X, 80, 1, Z)," & "80 (BC_2, *, CONTROL, X)," & "79 (BC_7, mLCD_DB_8, BIDIR, X, 78, 1, Z)," & "78 (BC_2, *, CONTROL, X)," & "77 (BC_7, mLCD_DB_9, BIDIR, X, 76, 1, Z)," & "76 (BC_2, *, CONTROL, X)," & "75 (BC_7, mLCD_DB_10, BIDIR, X, 74, 1, Z)," & "74 (BC_2, *, CONTROL, X)," & "73 (BC_7, mLCD_DB_11, BIDIR, X, 72, 1, Z)," & "72 (BC_2, *, CONTROL, X)," & "71 (BC_7, mLCD_DB_12, BIDIR, X, 70, 1, Z)," & "70 (BC_2, *, CONTROL, X)," & "69 (BC_7, mLCD_DB_13, BIDIR, X, 68, 1, Z)," & "68 (BC_2, *, CONTROL, X)," & "67 (BC_7, mLCD_DB_14, BIDIR, X, 66, 1, Z)," & "66 (BC_2, *, CONTROL, X)," & "65 (BC_7, mLCD_DB_15, BIDIR, X, 64, 1, Z)," & "64 (BC_2, *, CONTROL, X)," & "63 (BC_7, mGPIO5, BIDIR, X, 62, 1, Z)," & "62 (BC_2, *, CONTROL, X)," & "61 (BC_7, mGPIO7, BIDIR, X, 60, 1, Z)," & "60 (BC_2, *, CONTROL, X)," & "59 (BC_7, mGPIO8, BIDIR, X, 58, 1, Z)," & "58 (BC_2, *, CONTROL, X)," & "57 (BC_7, mGPIO10, BIDIR, X, 56, 1, Z)," & "56 (BC_2, *, CONTROL, X)," & "55 (BC_7, mNAND_RYBN1, BIDIR, X, 54, 1, Z)," & "54 (BC_2, *, CONTROL, X)," & "53 (BC_7, mNAND_RYBN2, BIDIR, X, 52, 1, Z)," & "52 (BC_2, *, CONTROL, X)," & "51 (BC_7, mNAND_RYBN3, BIDIR, X, 50, 1, Z)," & "50 (BC_2, *, CONTROL, X)," & "49 (BC_7, mUART_CTS_N, BIDIR, X, 48, 1, Z)," & "48 (BC_2, *, CONTROL, X)," & "47 (BC_7, mDAO_DATA0, BIDIR, X, 46, 1, Z)," & "46 (BC_2, *, CONTROL, X)," & "45 (BC_7, mDAO_WS0, BIDIR, X, 44, 1, Z)," & "44 (BC_2, *, CONTROL, X)," & "43 (BC_8, RSTIN_N, BIDIR, X, 42, 1, Z)," & "42 (BC_1, *, CONTROL, X)," & "41 (BC_1, *, INTERNAL, X)," & "40 (BC_1, *, INTERNAL, 1)," & "39 (BC_1, *, INTERNAL, X)," & "38 (BC_1, *, INTERNAL, 1)," & "37 (BC_1, *, INTERNAL, X)," & "36 (BC_1, *, INTERNAL, 1)," & "35 (BC_1, *, INTERNAL, X)," & "34 (BC_1, *, INTERNAL, 1)," & "33 (BC_1, *, INTERNAL, X)," & "32 (BC_1, *, INTERNAL, 1)," & "31 (BC_1, *, INTERNAL, X)," & "30 (BC_1, *, INTERNAL, 1)," & "29 (BC_1, *, INTERNAL, X)," & "28 (BC_1, *, INTERNAL, 1)," & "27 (BC_1, *, INTERNAL, X)," & "26 (BC_1, *, INTERNAL, 1)," & "25 (BC_1, *, INTERNAL, X)," & "24 (BC_1, *, INTERNAL, 1)," & "23 (BC_1, *, INTERNAL, X)," & "22 (BC_1, *, INTERNAL, 1)," & "21 (BC_1, *, INTERNAL, X)," & "20 (BC_1, *, INTERNAL, 1)," & "19 (BC_1, *, INTERNAL, X)," & "18 (BC_1, *, INTERNAL, 1)," & "17 (BC_1, *, INTERNAL, X)," & "16 (BC_1, *, INTERNAL, 1)," & "15 (BC_1, *, INTERNAL, X)," & "14 (BC_1, *, INTERNAL, 1)," & "13 (BC_1, *, INTERNAL, X)," & "12 (BC_1, *, INTERNAL, 1)," & "11 (BC_1, *, INTERNAL, X)," & "10 (BC_1, *, INTERNAL, 1)," & "9 (BC_1, *, INTERNAL, X)," & "8 (BC_1, *, INTERNAL, 1)," & "7 (BC_1, *, INTERNAL, X)," & "6 (BC_1, *, INTERNAL, 1)," & "5 (BC_1, *, INTERNAL, X)," & "4 (BC_1, *, INTERNAL, 1)," & "3 (BC_1, *, INTERNAL, X)," & "2 (BC_1, *, INTERNAL, 1)," & "1 (BC_1, *, INTERNAL, X)," & "0 (BC_1, *, INTERNAL, 1)"; end LPC315XFET208;