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Frequently asked questions

LPC1700 Series General FAQ

Cortex-M3 Core
Q What is the maximum operating speed for LPC17xx devices?
A Devices in our LPC1700 series can operate up to 100MHz.
Q On the LPC17xx, the ARM Cortex-M3 has three AHB-Lite buses: system bus, I-code (instruction fetch) bus, and D-code (data access) bus. Do these buses operate at the same speed, or can I configure I-code D-code bus to be slower than system bus?
A These buses operate at the same speed and cannot be individually configured.
Tools
Q Which debug and trace functions are integrated within the LPC17xx?
A The LPC17xx supports standard JTAG (5 pin), ARM Serial Wire Debug and Trace functions (Serial Wire Output), and parallel trace functions (ETM trace data—4 bits).
Q How many breakpoints and watch-points are supported on the LPC17xx?
A Eight breakpoints and four watchpoints are available via JTAG or SWD (Serial Wire Debug).
Q Is Boundary Scan available on the LPC1700 series?
A No. Boundary Scan is not currently available on the LPC1700 series.
Memory
Q Is battery RAM provided on the LPC17xx?
A Our LPC23xx and LPC24xx devices have 2KB of battery RAM provided which can hold all the vital information in deep power down mode. On the LPC17xx, instead of a battery RAM, 20 bytes of battery backed storage registers are provided to hold vital information in deep-power-down mode.
Q What is the flash endurance, flash retention, and flash write/erase timing?
A
Flash endurance and retention time are listed in the LPC17xx datasheets. Please see table below.
Flash erase time (single flash sector or full-chip erase) is 100ms and 256 bytes programming in 1ms.
Q I see flash corruption when I program the on-chip flash using IAP, but ISP is working fine. What is happening?
A The Copy RAM to Flash IAP command needs the system clock frequency as a parameter. Care must me taken with this parameter. Flash corruption might occur if this parameter is incorrect. If the PLL is used in the application, then the output of the PLL should be input as KHz.
Q Some of the IAP commands need the system clock frequency as parameter. What would this frequency be if I were using the PLL?
A Please also see the FAQ above. This parameter is a very important. If the PLL is used, the value of the parameter should be the output of the PLL in KHz. Otherwise, the crystal frequency should be input as KHz.
Q On the LPC17xx, which pin is used for entering ISP (In-System Programming) mode?
A P2.10 is used to enter ISP mode.

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