  | 74AHC1G00 |  | 5V Single 2-Input NAND Gate |
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| | 74AHCT1G00 | | 5V Single 2-Input NAND Gate; TTL Enabled |
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| | 74AHC1G02 | | 5V Single 2-Input NOR Gate |
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| | 74AHCT1G02 | | 5V Single 2-Input NOR Gate; TTL Enabled |
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| | 74AHC1G04 | | 5V Single Inverter |
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| | 74AHCT1G04 | | 5V Single Inverter; TTL Enabled |
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| | 74AHC1GU04 | | 5V Single Inverter (Unbuffered) |
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| | 74AHC1G06 | | 5V Single Inverter with Open-Drain Outputs |
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| | 74AHCT1G06 | | 5V Single Inverter with Open-Drain Outputs; TTL Enabled |
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| | 74AHC1G07 | | 5V Single Buffer with Open-Drain Outputs |
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| | 74AHCT1G07 | | 5V Single Buffer with Open-Drain Outputs; TTL Enabled |
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| | 74AHC1G08 | | 5V Single 2-Input AND Gate |
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| | 74AHCT1G08 | | 5V Single 2-Input AND Gate; TTL Enabled |
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| | 74AHC1G09 | | 5V single 2-input AND gate with open-drain output |
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| | 74AHC1G14 | | 5V Single Inverting Schmitt-Trigger |
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| | 74AHCT1G14 | | 5V Single Inverting Schmitt-Trigger; TTL Enabled |
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| | 74AHC1G32 | | 5V Single 2-Input OR Gate |
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| | 74AHCT1G32 | | 5V Single 2-Input OR Gate; TTL Enabled |
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| | 74AHC1G66 | | Single 5V single-pole, single-throw bilateral analog switch (SPST-NO) |
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| | 74AHCT1G66 | | Single 5V single-pole, single-throw bilateral analog switch (SPST-NO); TTL enabled |
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| | 74AHC1G79 | | 5V single D-type flip-flop; positive-edge trigger |
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| | 74AHCT1G79 | | 5V single D-type flip-flop; positive-edge trigger; TTL enabled |
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| | 74AHC1G86 | | 5V Single 2-Input EXCLUSIVE-OR Gate |
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| | 74AHCT1G86 | | 5V Single 2-Input EXCLUSIVE-OR Gate; TTL Enabled |
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| | 74AHC1G125 | | 5V Single Buffer/Line Driver with Active LOW Output Enable (3-State) |
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| | 74AHCT1G125 | | 5V Single Buffer/Line Driver with Active LOW Output Enable; TTL Enabled (3-State) |
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| | 74AHC1G126 | | 5V Single Buffer/Line Driver with Active HIGH Output Enable (3-State) |
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| | 74AHCT1G126 | | 5V Single Buffer/Line Driver with Active HIGH Output Enable; TTL Enabled (3-State) |
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| | 74AUC1G00 |  | 1.8V Single 2-Input NAND Gate |
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| | 74AUC1G02 | | 1.8V Single 2-Input NOR Gate |
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| | 74AUC1G04 | | 1.8V Single Inverter |
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| | 74AUC1G08 | | 1.8V Single 2-Input AND Gate |
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| | 74AUC1G32 | | 1.8V Single 2-Input OR Gate |
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| | 74AUP1G00 | | 1.8V single low-power 2-input NAND gate |
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| | 74AUP1G02 | | 1.8V single low-power 2-input NOR gate |
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| | 74AUP1G04 | | 1.8V single low-power inverter |
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| | 74AUP1GU04 | | 1.8V single low-power unbuffered inverter |
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| | 74AUP1Z04 | | 1.8V single low-power X-tal driver with enable and internal resistor |
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 | 74AUP1G06 | | 1.8V single low-power inverter with open-drain output |
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| | 74AUP1G07 | | 1.8V single low-power buffer with open-drain output |
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| | 74AUP1G08 | | 1.8V single low-power 2-input AND gate |
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| | 74AUP1G11 | | 1.8V single low-power 3-input AND gate |
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| | 74AUP1G14 | | 1.8V single low-power schmitt-trigger inverter |
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| | 74AUP1G17 | | 1.8V single low-power schmitt-trigger buffer |
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| | 74AUP1G18 | | 1.8V single low-power 1-of-2 demultiplexer with deselected output (3-state) |
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| | 74AUP1G19 | | 1.8V single low-power 1-of-2 decoder/multiplexer with a common output enable |
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| | 74AUP1G32 | | 1.8V single low-power 2-input OR gate |
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| | 74AUP1G34 | | 1.8V single low-power buffer |
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| | 74AUP1G38 | | 1.8V single low-power 2-input NAND gate with open-drain output |
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| | 74AUP1T34 | | 1.8V single low-power dual-supply voltage translating buffer |
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| | 74AUP1T45 |  | 1.8V single low-power dual supply voltage translating transceiver (3-state) |
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| | 74AUP1G57 | | 1.8V single low-power configurable multiple function gate |
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| | 74AUP1T57 | | 3.3V single low-power configurable multiple function gate with voltage-level translator |
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| | 74AUP1G58 | | 1.8V single low-power configurable multiple function gate |
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| | 74AUP1T58 | | 3.3V single low-power configurable multiple function gate with voltage-level translator |
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| | 74AUP1G74 | | 1.8V single low-power D-type flip-flop with set and reset; positive-edge trigger |
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| | 74AUP1G79 | | 1.8V single low-power D-type flip-flop; positive-edge trigger |
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| | 74AUP1G80 | | 1.8V single low-power D-type flip-flop; positive-edge trigger |
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| | 74AUP1G86 | | 1.8V single low-power 2-input EXCLUSIVE-OR gate |
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| | 74AUP1G97 | | 1.8V single low power configurable multiple function gate |
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| | 74AUP1T97 | | 3.3V single low-power configurable multiple function gate with voltage-level translator |
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| | 74AUP1G98 | | 1.8V single low-power configurable multiple function gate |
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| | 74AUP1T98 | | 3.3V single low-power configurable multiple function gate with voltage-level translator |
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| | 74AUP1G125 | | 1.8V single low-power buffer/line driver (3-state) |
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| | 74AUP1Z125 | | 1.8V single low-power X-tal driver with enable and internal resistor |
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| | 74AUP1G126 | | 1.8V single low-power buffer/line driver (3-state) |
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| | 74AUP1G132 | | 1.8V single low-power 2-input NAND Schmitt trigger |
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| | 74AUP1G157 | | 1.8V single low-power 2-input multiplexer |
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| | 74AUP1G158 | | 1.8V single low-power 2-input multiplexer; inverting |
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| | 74AUP1G175 | | 1.8V single low-power D-type flip-flop with reset; positive-edge trigger |
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| | 74AUP1G240 | | 1.8V single low-power inverting buffer/line driver; 3-state |
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| | 74AUP1G332 | | 1.8V single low-power 3-input OR gate |
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| | 74AUP1G373 | | 1.8V single low-power D-type transparent latch (3-state) |
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| | 74AUP1G374 | | 1.8V single low-power D-type flip-flop; positive-edge-trigger (3-state) |
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| | 74AUP1G386 | | 1.8V single low-power 3-input EXCLUSIVE-OR gate |
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| | 74AUP1G885 | | 1.8V single low-power dual function gate |
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| | 74AUP1G0832 | | 1.8V single low-power 3-input AND-OR gate |
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| | 74AUP1G3208 | | 1.8V single low-power 3-input OR-AND gate |
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| | 74AVC1T45 | | 2.5V single, dual-supply voltage level translating transceiver (3-state) |
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| | 74AVCH1T45 | | 2.5V single, dual-supply voltage level translating transceiver with bus hold (3-state) |
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| | 74CBTLV1G125 | | Single bus switch |
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| | 74HC1G00 | | 5V Single 2-Input NAND Gate |
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| | 74HCT1G00 | | 5V Single 2-Input NAND Gate; TTL Enabled |
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| | 74HC1G02 | | 5V Single 2-Input NOR Gate |
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| | 74HCT1G02 | | 5V Single 2-Input NOR Gate; TTL Enabled |
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| | 74HC1G04 | | 5V Single Inverter |
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| | 74HCT1G04 | | 5V Single Inverter; TTL Enabled |
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| | 74HC1GU04 | | 5V Single Inverter (Unbuffered) |
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| | 74HC1G08 | | 5V Single 2-Input AND Gate |
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| | 74HCT1G08 | | 5V Single 2-Input AND Gate; TTL Enabled |
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| | 74HC1G14 | | 5V Single Inverting Schmitt Trigger |
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| | 74HCT1G14 | | 5V Single Inverting Schmitt Trigger; TTL Enabled |
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| | 74HC1G32 | | 5V Single 2-Input OR Gate |
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| | 74HCT1G32 | | 5V Single 2-Input OR Gate; TTL Enabled |
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| | 74HC1G66 | | Single 5V single-pole, single-throw bilateral analog switch (SPST-NO) |
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| | 74HCT1G66 | | Single 5V single-pole, single-throw bilateral analog switch (SPST-NO); TTL enabled |
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| | 74HC1G86 | | 5V Single 2-Input EXCLUSIVE-OR Gate |
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| | 74HCT1G86 | | 5V Single 2-Input EXCLUSIVE-OR Gate; TTL Enabled |
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| | 74HC1G125 | | 5V Single Buffer/Line Driver with Active LOW Output Enable (3-State) |
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| | 74HCT1G125 | | 5V Single Buffer/Line Driver with Active LOW Output Enable; TTL Enabled (3-State) |
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| | 74HC1G126 | | 5V Single Buffer/Line Driver with Active HIGH Output Enable (3-State) |
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| | 74HCT1G126 | | 5V Single Buffer/Line Driver with Active HIGH Output Enable; TTL Enabled (3-State) |
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| | 74LVC1G00 | | 3.3V single 2-input NAND gate |
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| | 74LVC1G02 | | 3.3V single 2-input NOR gate |
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| | 74LVC1G04 | | 3.3V single inverter |
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| | 74LVC1GU04 | | 3.3V single inverter (unbuffered) |
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| | 74LVC1GX04 | | 3.3V crystal driver |
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| | 74LVC1G06 | | 3.3V single inverter with open-drain outputs |
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| | 74LVC1G07 | | 3.3V single buffer with open-drain outputs |
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| | 74LVC1G08 | | 3.3V single 2-input AND gate |
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| | 74LVC1G10 | | 3.3V single 3-input NAND gate |
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| | 74LVC1G11 | | 3.3V single 3-input AND gate |
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| | 74LVC1G14 | | 3.3V single schmitt-trigger inverter |
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| | 74LVC1G17 | | 3.3V single schmitt-trigger buffer |
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| | 74LVC1G18 | | 3.3V 1-of-2 non-inverting demultiplexer with 3-state deselected output |
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| | 74LVC1G19 | | 3.3V 1-of-2 decoder/demultiplexer |
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| | 74LVC1G32 | | 3.3V single 2-input OR gate |
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| | 74LVC1G34 | | 3.3V single buffer |
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| | 74LVC1G38 | | 3.3V single 2-input NAND gate with open-drain outputs |
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| | 74LVC1G53 | | Single 3.3V single-pole, double-throw, center-off analog switch (SPCO/SPTT) |
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| | 74LVC1G57 | | 3.3V single low-power configurable multiple function gate |
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| | 74LVC1G58 | | 3.3V single low-power configurable multiple function gate |
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| | 74LVC1G66 | | Single 3.3V single-pole, single-throw bilateral analog switch (SPST-NO) |
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| | 74LVC1G74 | | 3.3V single D-type flip-flop with set and reset; positive-edge trigger |
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| | 74LVC1G79 | | 3.3V single D-type flip-flop; positive-edge trigger |
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| | 74LVC1G80 | | 3.3V single D-type flip-flop; positive-edge trigger |
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| | 74LVC1G86 | | 3.3V single 2-input EXCLUSIVE-OR gate |
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| | 74LVC1G99 | | 3.3V single low-power ultra-configurable multiple function gate (3-state) |
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| | 74LVC1G125 | | 3.3V single buffer/line driver with active LOW output enable (3-state) |
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| | 74LVC1G126 | | 3.3V single buffer/line driver with active HIGH output enable (3-state) |
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| | 74LVC1G157 | | 3.3V single 2-input multiplexer |
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| | 74LVC1G175 | | 3.3V single D-type flip-flop with reset; positive-edge trigger |
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| | 74LVC1G332 | | 3.3V single 3-input OR gate |
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| | 74LVC1G384 | | Single 3.3V single-pole, single-throw analog switch (SPST-NC) |
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| | 74LVC1G386 | | 3.3V single 3-input EXCLUSIVE-OR gate |
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| | 74LVC1G3157 | | Single 3.3V single-pole, double-throw analog switch (SPDT) |
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| | NX3L1G53 | | Single low-voltage 0.5Ω low-ohmic, single-pole, double-throw, center-off analog switch (SPCO/SPTT) |
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| | NX3L1G66 | | Single low-voltage 0.5Ω low-ohmic, single-pole, single-throw analog switch (SPST-NO) |
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| | NX3V1G66 | | Single low-voltage 0.3Ω low-ohmic, single-pole, single-throw analog switch (SPST-NO) |
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| | NX3V1T66 | | Single low-voltage 0.3Ω low-ohmic, single-pole, single-throw analog switch (SPST-NO) with level translation |
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| | NX3L1G384 | | Single low-voltage 0.5Ω low-ohmic single-pole, single-throw analog switch (SPST-NC) |
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| | NX3V1G384 | | Single low-voltage 0.3Ω low-ohmic, single-pole, single-throw analog switch (SPST-NC) |
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| | NX3L1G3157 | | Single low-voltage 0.5Ω low-ohmic, single-pole, double-throw analog switch (SPDT) |
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| | NX3L1T3157 | | Single low-voltage 0.5Ω low-ohmic, single-pole, double-throw analog switch (SPDT) with level translation |
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| | NX3L1T5157 | | Single low-voltage 0.5Ω low-ohmic, single-pole, double-throw analog switch (SPDT) with level translation |
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