Low-profile Fine-pitch Ball Grid Array (LFBGA)

In support of customer demand and the industry's trend toward smaller, more compact designs, NXP, Texas Instruments (TI), and Integrated Device Technology, Inc. (IDT) have agreed to source logic devices with the same functionality and pin-outs in space-saving, low-profile, fine-pitch ball grid array (LFBGA) packaging. This initiative marks the first implementation of BGA packaging in logic devices. Space-constrained devices such as wireless telephone systems, base stations, networking systems, memory modules, and handheld computers are ideal applications for logic devices in LFBGA packages.

When compared to existing logic devices in other types of packages, such as TSSOP (thin shrink small outline package), the new LFBGA package will reduce board space by up to 65 percent for the same functionality. Compared with alternative types of packaging, the 0.8-mm ball pitch LFBGA logic package provides improved characteristics in areas such as electrical and thermal performance. The LFBGA package reduces inductance by 45 percent over TSSOP packages. Additionally, the small impedance variations between the package's pins results in a lower skew rate. In tests comparing the thermal performance of this LFBGA package with TSSOP packages, the LFBGA was found to be up to 50 percent more efficient at dissipating heat.

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SC16C654B 2.5V/3.3V/5V quad UART with 64-byte FIFOs and infrared (IrDA) encoder/decoder; up to 5Mbps; Motorola interface package option

CBTU4411 11-bit DDR2 SDRAM mux/bus switch with 12Ω on-resistance

LH79524 System-on-Chip with ARM720T microcontroller, 16KB SRAM, LCD controller up to true color or XGA, touch screen controller, MMU, AHB, APB, 32-bit external memory interface, USB 1.1 full speed device, 10/100 ethernet, I2C, 10-bit ADC

LH7A400 System-on-Chip with ARM9TDMI microcontroller, 80KB SRAM, LCD controller up to 16-bit and XGA, MMU, AC97 audio, AHB, APB, external memory interface, USB 1.1 full speed device, PCMCIA, CF, MMC, Smart Card

LH7A404 System-on-Chip with ARM9TDMI microcontroller, 80KB SRAM, LCD controller up to 16-bit and XGA, touch screen controller, MMU, AC97 audio, AHB, APB, external memory interface, USB 1.1 full speed host/device, PCMCIA, CF, SD/MMC, Smart Card, 9x10-bit ADC, PS/2

LPC3180 See LPC3180/01 replacement

LPC3180/01 ROMless ARM9 microcontroller with SDRAM interface, USB On-The-Go

PX1011A PCI Express stand-alone X1 PHY; See PX1011B replacement

PX1011B PCI Express stand-alone X1 PHY with improved transmitter jitter and supply range

PX1012A PCI Express stand-alone X1 PHY for PLDA's IP core; See PX1011B replacement

SSTV16859 2.5V 13-Bit to 26-Bit SSTL_2 Registered Driver for Stacked DDR DIMM

74ALVCH32501 3.3V 36-Bit Universal Bus Transceiver; Positive Edge Trigger Clock with Bus Hold (3-State)

74LVCH32244A 3.3V 32-Bit Buffer/Line Driver; Non-Inverting with Bus Hold (3-State)

74LVCH322244A 3.3V 32-Bit Buffer/Line Driver; Non-Inverting with Bus Hold and 30 Ohm Termination Resistors (3-State)

74LVC32245A 3.3V 32-bit bus transceiver with direction pin; non-inverting (3-state)

74LVCH32245A 3.3V 32-bit bus transceiver with direction pin; non-inverting with bus hold (3-state)

74LVCH322245A 3.3V 32-bit bus transceiver with direction pin; non-inverting with bus hold and 30 ohm termination resistors (3-state)

74LVCH32373A 3.3V 32-Bit D-Type Transparent Latch with Bus Hold (3-State)

74LVCH32374A 3.3V 32-bit D-type flip-flop; positive-edge trigger; with bus hold (3-state)

74LVTH32245 3.3V 32-bit bus transceiver (3-state)

74LVTH322245 3.3V 32-bit bus transceiver with 30Ω termination resistors (3-state)

74LVT32374 3.3V 32-bit D-type flip-flop; positive edge-trigger (3-state)

SSTU32864 1.8V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer for DDR2 RDIMM applications

SSTUA32864 1.8V configurable registered buffer for DDR2-667 RDIMM applications

SSTUB32864 1.8V configurable registered buffer for DDR2-800 RDIMM applications

SSTUH32864 1.8V high output drive configurable registered buffer for DDR2 RDIMM applications

SSTU32866 1.8V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR-II RDIMM applications

SSTUA32866 1.8V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2-667 RDIMM applications

SSTUB32866 1.8V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2-800 RDIMM applications

SSTUG32866 1.8V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2-1G RDIMM applications

SSTUH32866 1.8V high output drive 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2 RDIMM applications

SSTUP32866 1.8V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity and programmable output for DDR2-800 RDIMMs

SSTUM32866 1.8V 25-bit 1:1 or 14-bit 1:2 configurable registered buffer with parity for DDR2-1G RDIMM applications

96 Ball		114 Ball
TSSOP/LFBGA Comparison		LFBGA Side View

• Package Outline Drawings
• Standard Packing Quantities

• AN10365 Surface Mount Reflow Soldering Description, V4 (Aug 13, 2009)
• ANLFBGA 32-Bit Logic Families in Low-profile Fine-pitch Ball Grid Array (LFBGA) Packages (Oct 26, 1998)