Heatsink Very-thin Quad Flat-pack No-leads (HVQFN)

NXP continues to offer our customers the benefits of smaller and smaller packages. The HVQFN package provides a significantly smaller, low pad-count, leadless alternative to the TSSOP package, previously the industry's smallest gate and octal logic package.

Like the DQFN, the HVQFN is a leadless package where electrical contact is made by soldering the pads on the bottom surface of the package to the board, instead of the conventional formed perimeter leads. Pads are equally spaced along all four sides with an exposed die paddle in the center that is normally bonded to the die GND.

The exposed die paddle technology enhances the thermal and electrical qualities of the package. The die-attach paddle on the bottom efficiently conducts heat to the board. Tests comparing the HVQFN's thermal performance with TSSOP's show that the HVQFN dissipates heat up to 20% more efficiently.

Also, with the contact surfaces beneath the package, there is no risk of bent lead or co-planarity problems. Handling and packaging becomes easier as a result of this. And, like the VFBGA, the shorter wire length and shorter internal traces improve package performance by up to 20% over TSSOP. Package inductance is also reduced by 60% and capacitance by 30% compared to TSSOP.

The design of the HVQFN package also allows for frequency flexibility in your design. Its enhanced electrical performance enables, with some design considerations, the standard 2GHz frequency to be increased up to 10GHz.

To achieve peak performance, special considerations are needed to properly design the circuit board and to mount the package. For enhanced thermal, electrical, and board-level performance, the exposed pad on the package needs to be soldered to the board using a corresponding thermal pad on the board. Furthermore, for proper heat conduction through the board, thermal vias need to be incorporated in the PCB in the thermal pad region. The PCB footprint design needs to be considered from dimensional tolerances due to package, PCB, and assembly.

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• Package Outline Drawings
• Standard Packing Quantities

The HVQFN package die supply ground is connected to both the GND pin and the exposed center pad. The GND pin must be connected to supply ground for proper device operation.

For enhanced thermal, electrical, and board-level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board. For proper heat conduction through the board, thermal vias need to be incorporated in the PCB in the thermal pad region.

• AN10366 HVQFN Application Information, V2 (Jan 12, 2006)

• Contact Us for Surface Mount Assembly and Manufacturing Information