ProductsLogicSupportAdvanced Features

Advanced logic features

Bus Hold

Used or unused CMOS device inputs should not be left floating. Floating inputs can cause extra current to flow through the input structure, causing extra wasted power dissipation, or they can cause high frequency oscillations, generating heat that may eventually damage the part. A common solution for this is to connect the input to VCC or to ground through a pull-up or pull-down resistor. The disadvantage of this is an extra component is needed as well as extra board space, and the resistor dissipates extra power.
A number of logic families use an integrated bus hold circuit which eliminates the need for external resistors and saves board space. The circuit is shown below:
Integrated Bus Hold Circuit
The bus hold circuit holds the last known valid state of the input when the bus starts to float. There is a minimum hold current (IHOLD or IBHH/IBHL) of 75μA at the input switching levels of 2.0V and 0.8V. An overdrive current of ±500μA (IBHLO/IBHHO or IHOLD) is required to toggle the bus hold cell into the LOW or HIGH state. The circuit has minimal impact to input/output capacitance and is about 0.5pF. This adds a slight increase to the driver's propagation delay of about 40ps for 8mA drivers and about 15ps for 24mA drivers per each bus hold input.
  • Available on ABTH16, LVCHA, LVCH16A, ALVCH, LVT, LVT16, and ALVT families.
  • For further reference, please refer to Application Note AN2022, The Behavior of Integrated Bus Hold Circuits, document number 9397-750-00798.
Standard ICs quick find
Standard ICs sections