Advanced logic features

With the trend towards 3.3- and lower-voltage processors, memories, and ASICs comes the need for devices to operate in mixed-voltage systems. Current systems often use a mix of 3V and 5V components besides using only pure 5V or pure 3V components. This requires a 3 V device's input and output pins to be able to reliably tolerate 5V signals as well as 3V signals. Pure bipolar structures have no problem with this, however, parts with classic CMOS input and output structures have diodes--thus a current path--to V_CC, thereby not allowing 5V signals.

Many 3V logic families use designs that allow 5V signals on inputs and outputs. The following figure shows a 5V tolerant input circuit for LVC(H)A, LVC(H)16A, LVT(16), and ALVT families:

Figure 1: LVC(H)A, LVC(H)16A, LVT(16), and ALVT Input Circuit

The following two figures show 5V tolerant bus hold circuits for LVC(H)A/LVC(H)16A and for LVT(16)/ALVT families, respectively:

Figure 2: LVC(H)A and LVC(H)16A Bus Hold Circuit

Figure 3: LVT(16) and ALVT Bus Hold Circuit

The following two figures show 5V tolerant output circuits for LVC(H)A and for LVT(16)/ALVT families, respectively:

Figure 4: LVC(H)A Simplified Output Circuit

Figure 5: LVT(16)/ALVT Simplified Output Circuit

In the preceding figures, the comparator turns off and protects the LVT and ALVT upper PMOS transistor in the active HIGH state when the output is 0.5V greater than V_CC. The output current (I_EX) is limited to 125uA. In the 3-State mode, the reversed biased Schottky diode prevents current flow to the 3.3V supply if a 5V signal is applied to the output. In the 3-State mode only, the LVC's comparator shorts out and protects the parasitic diode when the output is above V_CC. For further reference, please refer to Application Note AN240, Interfacing 3V and 5V Applications, document number 9397-750-00282.

• Available on the low voltage families of LVC(H)A, LVC(H)16A, LVT, LVT16, and ALVT.